Motorola 68010 is an interesting CPU. It has a 2-instruction cache for a specific opcode: DBcc. When a cacheable 2-byte instruction is combined with DBcc that loops back to this instruction, the 68010 automatically enters a loop mode. In this mode, the instructions don't need to be fetched, leading to a performance boost over the 68000.
As a practical example, I came up with this strlen() implementation that (as far as I can tell) is the fastest way strlen() can be implemented on a 68010 CPU.